Oh my! Now I have 32 KB RAM and a program counter. That course is just going too fast…
A few comments:
- The hardware simulator showed some hanging when I was testing my RAM64 and RAM512 (implemented in pure HDL down to 1-bit register, which implied many chips in my own computer’s RAM). The workaround was to stop running the script, single step a few times, and restart the script from there.
- The claim that one gets to build all chips from the ground up from Nand gates in the course has one exception: the data flip-flop. That chip is given, and I am not sure whether one actually can build it and run it in the simulator, since it is the lowest level chip that interacts with the clock.
- The program counter implementation was particularly interesting. I started simply, then got the feeling that using a 4-way Mux16 could be clever, implemented such a solution, which worked, didn’t like its complexity, and went back to the simpler solution. The simpler solution worked too, but was well… simpler and actually used fewer gates.
Gotta go back to read about this instruction set architecture we’re gonna choose…
My project 2 of Nand2Tetris is now completed, and I have a working ALU. In the process of implementing it, I also created 2 more chips. I had interpreted the book‘s instructions as an encouragement to build at least one separate chip as a building block that would be used at least twice in the ALU.
As mentioned in previous posts, the course is entirely free and open, and I am taking it as self studies at home. Ironically, although my academic education (that ended more than 20 years ago) is highly ranked (at least in France, where I took it), I did not have many courses at that level of quality, or many teachers who were as inspiring as Shimon Schocken.
This course is just amazing, and I urge anyone interested in computer science to take it.
Anyway, the ALU is now working. So I should be able to implement it in Minecraft red stone, right? Well, I do have other things to do in my life.
After all, I have to add some sequential logic to that computer I am building.
After my previous article about Nand2Tetris, I jumped directly into module 1. As a matter of routine, I first read the chapter in the book, browse through the slides that can be found on the web site (the book chapters can actually also be found on the web site), and then follow the project instructions (also on the web site).
I am now very proud of having built and verified the following logic gates:
- Not gate
- And gate
- Or gate
- Xor gate
- Mux gate
- DMux gate
- 16-bit Not
- 16-bit And
- 16-bit Or
- 16-bit multiplexor
- 16-bit/4-way mux
- 16-bit/8-way mux
- 4-way demultiplexor
- 8-way demultiplexor
I won’t tell how, that would be against Nand2Tetris’ policy (students have to find the solutions for themselves).
I guess I am now ready to dig into Boolean arithmetic (module 2, as opposed to Boolean logic, which was the topic of module 1).